Digital electronic timepiece having a perpetual calendar display device

ABSTRACT

A digital electronic timepiece having a perpetual calendar display device comprises a standard oscillator for producing a pulse signal having a frequency high enough to serve as a time reference base, a divider circuit connected to the oscillator for dividing the pulse signal into a one-second signal having a frequency of one pulse per second, a series of counters, for counting the one-second signals and developing appropriate second, minute and hour signals and applying same to a display panel for displaying the time in seconds, minutes and hours, and a perpetual calendar display device for receiving the signals from the last of the series of counters and automatically and correctly displaying the month and the date of the month. The perpetual calendar display device comprises a day counter for successively delivering a date signal on each successive day, a shift register connected to the day counter for providing an output signal corresponding to each successive month of the year, and electronic circuitry responsive to both the date signals and the signals from the shift register to automatically reset the day counter to commence counting at the first day and to shift the register to the proper month. A display panel receives the date signals from the day counter and the month signals from the register and displays the correct month and date of the month.

United States Patent Kato [451 Mar. 19, 1974 DIGITAL ELECTRONICTIMEPIECE HAVING A PERPETUAL CALENDAR DISPLAY DEVICE [75] Inventor:Takashi Kato, Tokyo, Japan [73] Assignee: Kabushiki Kaisha DainiSeikosha,

Tokyo, Japan [22] Filed: Oct. 5, 1972 [21] Appl. No.: 295,194

[30] Foreign Application Priority Data Oct. 5, 1971 Japan 46-78115 Oct.5. 1971 Japan 46/78116 [52] U.S. Cl 58/4 A, 58/58, 58/85.5,

' I 40/107 [51] Int. Cl. G04b 19/24 [58] Field of Search 40/107; 58/4 R,4 A, 23 R, 58/50 R. 58. 85.5; 235/92 SW; 340/168 SR [56] ReferencesCited UNITED STATES PATENTS 3,333.410 8/1967 Barbella 58/23 R 3,516,2426/1970 Lehovec 3,477,222 11/1969 Leung et a1 58/4 A PrimaryExaminer-Richard B. Wilkinson Assistant E.taminer-Edith Simmons JackmonAttorney, Agent, or Firm Robert E. Burns; Emmanuel J. Lobato 5 7]ABSTRACT A digital electronic timepiece having a perpetual calendardisplay device comprises a standard oscillator for producing a pulsesignal having a frequency high enough to serve as a time reference base,a divider circuit connected to the oscillator for dividing the pulsesignal into a one-second signal having a frequency of one pulse persecond, a series of counters, for counting the one-second signals anddeveloping appropriate second, minute and hour signals and applying sameto a display panel for displaying the time in seconds, minutes andhours, and a perpetual calendar display device for receiving the signalsfrom the last of the series of counters and automatically and correctlydisplaying the month and the date of the month. The perpetual calendardisplay device comprises a day counter for successively delivering adate signal on each successive day, a shift register connected to theday counter for providing an output signal corresponding to eachsuccessive month of the year, and electronic circuitry responsive toboth the date signals and the signals from the shift register toautomatically reset the day counter to commence counting at the firstday and to shift the register to the proper month. A display panelreceives the date signals from the day counter and the month signalsfrom the register and displays the correct month and date of the month.

18 I7 I 4-ABIC l2-BIT sun-r REGISTER CO E (lzmnuons) (a) (71 (s; (5) (4)(a) (2) m l l A me m We -|7b I7a CLOCK a PULSE (3:) u -I/ 31-ABICCOUNTER \lb (28) (29) (so) b 9 f baa 5 l -bb I 6d 24-ne1c, ,5

13 COUNTER -|8a A I 1 Q 7 'eo-Aslc COUNTER 4a 15 e 2 COUNTER r r IOSCILLATOR DlVlDER PATENTEUHARIS m4 3791.222

SHEET 2 OF 2 FIG. 4 I l2-BIT 'I-BIT 3l-ABIC SHIFT REGISTER SHIFTREGISTER COUNTER I8 30 050005}? DRIVER DECODERIDRIVER ?)l 33 T -6a 7 SUNMON TUE WED THU FRI SAT MATRIX 8 9 IO M I2 l3 l4 l5 I6 l7 l8 I9 20 2|FIG. 5

DIGITAL ELECTRONIC TIMEPIECE HAVING A PERPETUAL CALENDAR DISPLAY DEVICEThe present invention relates generally to a digital electronictimepiece and more particularly to a digital electronic time piecehaving a perpetual calendar display device for automatically displayingthe month and the correct date of each month irrespective of thedifferent number of dates in the various months.

It is desirable to provide a display device in a timepiece whichautomatically displays the correct date and which does not requiremanual correction to account for the different number of days indifferent months and to account for the extra day occurring in leapyear. in mechanical timepieces, it is necessary to provide complicatedcam-actuated lever mechanisms and a specially designed date wheel toautomatically correct for the different number of dates in each month ora specially designed mechanism must be used which coacts with thetransmitting wheel to correct for the different dates. In order toautomatically correct for the extra day occurring in leap year,additional mechanisms must be employed and all of these speciallydesigned components and additional mechanisms increase the complexity ofthe mechanical timepiece as well as weight and accordingly increase thecost of the timepiece.

It is therefore a primary object of the present invention to provide adigital electronic timepiece of the solid state type having a perpetualcalendar display device for automatically displaying the date of eachmonth irrespective of the different number of dates in the variousmonths.

It is a further objectof the present invention to provide a digitalelectronic timepiece having a perpetual calendar display device whichautomatically and correctly displays the months and the date of themonth.

It is a still further object of the present invention to provide adigital electronic timepiece having a perpetual calendar display devicefor correctly displaying the date and for automatically correcting forthe extra day occurring in each leap year.

The above and other objects are carried out by a perpetual calendardisplay device comprising a standard oscillator for producing a pulsesignal having a frequency high enough to serve as a time reference base;

a divider circuit for dividing the pulse signal into 1- second signalhaving a frequency of one pulse per secend, a series of counters forcounting the l-second signals and developing appropriate second, minuteand hour signals and applying same to a display panel for displaying thetime in seconds, minutes and hours, and perpetual calendar display meansreceptive of a oneday signal from the last of the series of counters forautomatically and correctly displaying the month and the date of themonth. The perpetual calendar display means comprises a day counter forsuccessively delivering a 1-day signal on each successive day, a shiftregister for providing an output signal at each successive month of theyear, electronic circuitry responsive to the one-day signal and thesignals from the shift register to automatically reset the day counterto commence counting at the first day and to shift the shift register tothe proper month, and a display panel receptive of the one-day signalsfrom the day counter and the output signals from the shift register tocorrectly display the month and date of the month.

Having in mind the above and other objects that will be evident from anunderstanding of the disclosure, the present invention comprises thecombinations and arrangements of parts as illustrated in the presentlypreferred embodiments of the invention which are hereinafter set forthin sufficient detail to enable those persons skilled in the art toclearly understand the function, operation, construction and advantagesof it when read in conjunction with accompanying drawings wherein likereference characters denote like parts in the various views and wherein:

FIG. 1 isa block diagram showing the electronic circuitry of oneembodiment of a digital electronic timepiece having a perpetual calendardisplay device according to the present invention;

FIG. 2 is a block diagram showing the electronic circuitry of anotherembodiment of a digital electronic timepiece having a perpetual calendardisplay device according to the present invention;

FIG. 3 is a schematic view of a display panel connected to theelectronic circuitry shown in either FIGS. 1 or 2; 4

FIG. 4 is a block diagram showing another portion of the electroniccircuitry of a perpetual calendar display device according to thepresent invention; and

FIG. 5 is a fragmentary view showing the details of a date display panelemployed in the perpetual calendar display device of the presentinvention.

One embodiment of the electronic circuitry employed in the electronictimepiece having a perpetual calendar display device of the presentinvention is shown in FIG. 1. An oscillator 1 generates a pulse sig-'nal having a frequency high enough to serve as a time reference base andthis pulse signal is applied to a divider circuit 2. The divider circuit2 divides the pulse signal into a one-second signal having a frequencyof one pulse per second.

The l-second signal is fed to a 60-abic counter. 3 which delivers acorresponding succession of onesecond signals to an output line 3a andthe counter 3 counts 60 such l-second signals and then delivers acorresponding l-minute signal to a 60-abic counter 4. The counter 4delivers a succession of l-minute signals to an output line 4a andcounts 60 such l-minute signals and then supplies a l-hour signal to a24-abic counter 5. In a similar manner, the counter 5 delivers asuccession of l-hour signals to an output line 5a and counts 24 suchl-hour signals and then delivers a l-day signal and applies same to aday counter 6.

The day counter 6 comprises a 3 l'-abic counter having 31 outputterminals corresponding to the 31 maximum possible days in a month. InFIG. 1, only the last four output terminals are shown and thesecorrespond to the 28th day, 29th day, 30th day and 31st day of a month.The counter 6 counts the l-day signals from the counter 5 delivers adate signal once each successive day along a line 6a commonly connectedto the output terminals.

Each signal produced from the outputs of the counters 3-6 aretransmitted through a driver circuit (not shown in the drawings) alongthe lines 3a 6a to a display panel 12, such as shown in FIG. 3. Thedisplay panel 12 comprises a plurality of individual display elements 811 each connected to one of the lines 3a-6a for displaying theappropriate time and date information. The display element 8 includes inthe upper right corner the letter S and is connected to the line 30 fordisplaying the time in seconds. The display element 9 includes in theupper right corner the letter M and is connected to the line 4a forreceiving the l-minute signal and accordingly displaying the time inminutes.

In a similar manner, the display elements 10 and 11 include respectivelythe letters H and D and are connected to the lines 5a and 6a forrespectively displaying the time in hours and the numerical date. Thecounters 3-6 are of well-known construction and may comprise a series offlip-flop circuits connected in cascade and feeding the outputs insuitable stages back to the preceding stages or a series of gatecircuits may be used. The details of the display panel 12 and thecorrespond ing driving circuits are of conventional construction andtherefore will not be further described.

The day counter 6 shown in FIG. 1 also includes a set of output lines6b, 6c, 6d and 62 connected respectively to the output terminals 28, 2930 and 31 corresponding to the 28th, 29th, 30th and 31st day of a month.The

output lines 6b, 6c and 6e are respectively connected to gate circuits13, 14 and 15 for the purpose hereinafter described. The output line 6eis connected a 12-bit shift register 17 having 12 output terminals 1 12corresponding respectively to the months from January through December.A set oflines 17b, 17c, 17d and 17s are respectively connected to theoutput terminals 4, 6, 9 and 11 and these output terminals correspond tothe months having only 30 days, i.e., April, June, September andNovember. The lines 17b 17e are connected to the AND gate 15 and to anAND gate 16.

An output line 17a is connected to the output terminal 2 correspondingto the month of February which has either 28 or 29 days depending uponthe presence of leap year and the output line 17a is connected to boththe AND gate 13 and the AND gate 14. An output line 17f is connected tothe output terminal 12 corresponding to the month of December andconnects the output terminal 12 to a four-abic counter 18. The counter18 counts four successive month signals appearing on the output terminal12 and delivers a corresponding leap'year signal on a line 18a which isconnected through a NOT gate 19 to the AND gate 13 and the line 18a isalso connected directly to the AND gate The AND gate 16 has three inputsincluding one input connected to the lines 17b-17e, another inputconnected to the outputs of the AND gates 13 and 14, and a third inputfor continuously receiving clock pulses during use of the device.Whenever a signal is present on all three inputs, the AND gate 16 willdeliver clock pulses to the day counter 6 along a line 16a.

The operation of the circuitry shown in FIG. 1 will now be describedtaking as an example the month of January. At the end moment of each dayor the beginning moment of the following day, a date signal or l-daysignal is delivered from theday counter 6 and applied to the displaypanel 12 which responds to the date signal and displays the correctdate. On the 28th day, the date signal is also applied to the line 6band fed to the AND gate 13. Since the shift register 17 is in theposition corresponding to the month of January, no output signal appearson the output terminal 2 and consequently no signal is fed to the ANDgate 13 and therefore the AND gate remains in its blocking state and nooutput signal is fed therefrom to the AND gate 16.

In a similar manner, during the 29th and 30th days, the date signalsappearing on the lines 60 and 6d are blocked by the respective AND gates15 and 14 due to the position of the shift register 17. At the end ofthe 31st day, the date signal appearing on the line 6e is fed to theshift register 17 to shift the register to a state wherein an outputmonth signal is produced at the output terminal 2 corresponding to themonth of February. In addition, the date signal appearing on the line 6eis also fed back to the counter as a reset signal to reset the counterin acondition to begin counting again at the first day. 1

During the month of February, each successive day is counted by the daycounter 6 and a corresponding date signal is applied to the displaypanel 12 which displays the correct date. When the 28th day is counted,the date signal appearing-on the line 6b is fed to the AND gate 13coincidently with the output signal from the output terminal 2 to theshift register 17 and coincidently with the signal delivered from theNOT gate 19. Since signals are applied simultaneously to all of theinputs of the AND gate 13, the AND gate is placed in its gating stateand delivers an output signal to the AND gate 16.

The AND gate 16 thus simultaneously receives three input signalscomprising the output signal from the line 17a, the output signal fromthe AND gate 13 and the clock pulse signal whereby the AND gate 16 isplaced in its gating state and passes the clock pulse signal on the line16a to rapidly drive the day counter 6 and place same in a condition tobegin counting with the first day. In this instance, three clock pulsesare applied to the counter 6 to quickly drive the counter from the 28thday to the 31st day whereupon a reset signal appears at the outputterminal 31. The reset signal is fed back tothe counter to reset same ina condition to commence counting at the first day and the reset signalis applied to the register 17 to shift same to a condition wherein theoutput month signal is delivered from the terminal 3 corresponding tothe month of March.

When the shift register is in this state, the gate circuit 16 ismaintained in its blocking state since the output terminal 3 is notconnected to the line 17a and therefore this line does not deliver aninput signal to the AND gate 16. Thus the day counter 6 commencescounting from the first day in March and the days of March are countedin the same manner as those in J anuary and at the end of the 3 1st day,a reset signal is delivered along the line 6e to reset the shiftregister 17 to the output terminal 4 corresponding to the month of Apriland to also reset the day counter 6 to begin countingat the first day ofthe month of April.

The output terminal 4 corresponding to the month of April is connectedvia the line 17b to the AND gates 15 and 16 and thus on the 30th day ofApril, the signal produced on the line 6d cooperates with the signalfrom the output terminal 4 of the shift register 17 to operate the ANDgate 15 which then delivers a signal to the AND gate 16. Asaforementioned, the AND gate 16 simultaneously receives three inputsignals thereby enabling the clock pulse signal to be applied along theline 16a to the day counter 6 to cause a reset signal to be produced onthe line 6e to thereby reset the day counter 6 and shift the shiftregister 17 to the output terminal 5 corresponding to the month of May.

The days in the months of May, July, August, October and December arecounted and displayed in the same manner as those in January, and Marchwhereas the days in the months of June, September and November arecounted and displayed in the same manner as those in the month of April.In the latter case, the clock pulse signal is used to produce the resetsignal on the line 6e on the 30th day of each month. Thus the counter 6is reset on the 3 1st day of each month and the shift register 17 shiftsthe signal to the next succeeding output terminal.

It will be understood that the date displayed by the display element 11is automatically changed and corrected to properly display the correctday despite the difference in the number of days in different months.

In order to correct for the extra day in each leap year,

the output terminal 12 of the shift register 17 applies a signal to thecounter 18 once each year. The counter 18 counts four signals and thenapplies a leap year signal along the line 18a to operate the gatecircuit 14 on the 29th day of February during each leap year. On the29th day of February, the date signal appearing on the line 66 coactswith the output signal from the output terminal 2 of the shift register17 to operate the AND gate 14 and place same in its gating state wherebythe AND gate 14 delivers a signal to the AND gate 16. I The AND gate 16is placed in its gating state in response to the simultaneousapplication of the signal from the output terminal 2 of the shiftregister 17, the clock pulse signal, and the output signal from the ANDgate 14 whereupon the AND gate 16 delivers a signal along the line 16ato the day counter 6 to quickly drive the day counter 6 to the 31st dayas delineated above. During a leap year, the leap year signal is appliedto the NOT gate 19 and the NOT gate does not then deliver an outputsignal to the AND gate 13 and therefore the AND gate 13 is maintained inits blocking state on the 28th day of February thereby preventingoperation of the AND gate 16.

Another embodiment of the electronic circuitry employed in theelectronic timepiece having a perpetual calendar display deviceaccording to the present invention is shown in FIG. 2. This circuitry issimilar to that shown in FIG. 1 except that a' resetting circuit 16a isemployed instead of the AND gate circuit 16. The resetting circuit 16ahas an output connected to both the day counter 6 to reset the counterand to the shift register 17 to reset the register.

In this embodiment, the AND gates 13, 14 and 15 each have and outputline connected to the resetting circuit 16a and an output of the daycounter 6 is also applied as an input to the resetting circuit 16a. TheAND gate 13 is connected on its input side to the output terminal 2corresponding to the month of February of the shift register 17; the ANDgate 14 is connected on its input side to the output terminal 2 of theshift register 17 as well as to the counter 18; and the AND gate 15 isconnected on its input side to the output terminals 4, 6, 9, 11 of theshift register 17 corresponding respectively to the months of April,June, September and November.

The operation of the circuitry shown in FIG. 2 will On the 28th day ofFebruary, the day counter 6 produces an output signal at the outputterminal 28 and this signal is applied along the line 6b to the AND gate13. At the same time, the output terminal 2 of the shift register 17applies a signal along the line 17a to the AND gate 13 thereby placingthe gate in its gating state whereupon an output signal is applied tothe resetting circuit 16a. The resetting circuit then delivers a resetsignal to the day counter 6 to reset the counter in a condition to begincounting at the first day and also delivers a reset signal to the shiftregister 17 to shift the register into a state wherein an output monthsignal is produced at the output terminal 3 corresponding to the monthof March.

The days of March are counted in the same manner as those in January andat the end of the 31st day, a reset signal is delivered from the outputterminal 31 of the day counter 6 and applied along the line 6e to theshift register 17 to shift same into a state wherein an output signal isdelivered at the output terminal 4 corresponding to the month of April.

On the 30th day of April, an output signal is produced at the outputterminal 30 of the day counter 6 and applied along the line 6d to theAND gate 15. At the same time, an output signal is present on the outputterminal 4 of the shift register 17 and applied along the line 17h tothe AND gate 15 to place the AND gate in its gating state whereupon thegate passes a signal to the resetting circuit 16a which in turn appliesa reset signal to both the shift register 17 to shift same into a statewherein an output signal is produced at the output terminal 5 and at thesame time to the day counter 6 to reset same.

The days in the months of May, July, August, October and December arecounted and displayed in the same manner as those in the months ofJanuary and March. In a similar manner, the days in the months of June,September are counted and displayed in the same manner as those in themonth of April. I

It will be understood that the date displayed by the display element 11of the display panel 12 is automatically changed and always displays thecorrect date despite the difference in the number of days in the variousmonths.

The circuitry shown in FIG. 2 also corrects for the 1 day difference inthe number of days in a leap year and for this purpose, the outputterminal 12 of the shift register 17 corresponding to the month ofDecember is connected to a four-abic counter 18 which counts foursuccessive signals appearing on the output terminal 12 and then deliversa leap year signal along a line 18a. The line 18a is connected to theAND gate 14 and to the NOT gate 19 and therefore the presence of theleap year signal on the lines 18a maintains the AND gate 13 in itsblocking state on the 28th day of February and places the AND gate 14 inits gating state on the 29th day of February.

One embodiment of the display portion of the perpetual calendar displaydevice according to the present invention as shown in FIG. 4. Either thecircuitry shwon in FIGS. 1 or 2 may be used with the circuitry shown inFIG. 4 and for the sake of simplicity, the gate circuits for displayingthe calendar have been omitted from FIG. 4. The display portioncomprises a display panel 20 composed of a day display section 21 fordisplaying the day of the week, a date display section 22 for displayingthe date, a month display section 23 for display- 7 ing the month, and'a leap year section 24 for displaying the presence of a leap year.

The date display section 22 is shown in more detail in FIG; andcomprises a covering panel 25 made of opaque material having formedtherein an array of date numerals indicating the 31 possible dates of amonth. A series of photoelectric elements 27 is disposed beneath thecovering panel 25 and function to emit light for making visible the datenumerals in response to individual energization of the photoelectricelements. The photoelectric elements may comprise liquid crystals orlight-emitting diodes or any other similarly functioning photoelectriccomponents. Two electrode sheets 26 and 28 are disposed on oppositefaces of the photoelectric elements 27 and function to apply suitablevoltage to the photoelectric elements to energize them.

Considering again the display portion shown in FIG. 4, the date signalproduced by the day counter 6 is applied along the line 6a through amatrix circuit 29 to the date display section 22 to sequentiallyenergize the photoelectric elements 27 to successively display thenumerical dates. Thus the correct date is always displayed on thedisplay panel.

The output terminal 31 of the day counter 6 is connected to a seven-bitshift register 30 which responds to the signal appearing at the terminal31 to shift through a succession of seven different states. The sevendifferent output signals from the shift register 30 are applied througha decoder driver circuit 31 to the day display section 21 whereupon theseven days of the week are successively displayed. The output signalfrom the output terminal 31 of the day counter 6 is also applied to theshift register 17 and the register 17 applies its output month signalsthrough a decoder driver circuit 32 to the month display section 23 fordisplaying the correct month. The output terminal 12 of the shiftregister 17 is connected through a decoder driver circuit and a drivercircuit 33 to the leap year display section 24 for displaying the leapyear.

Thus it may be seen that the digital electronic timepiece having aperpetual calendar display device according to the present inventionprovides many advantages. The first date of the month is automaticallydisplayed after all of the dates of the preceding month have beendisplayed. The device automatically corrects for the extra day appearingin each leap year Furthermore, the device displays numerous types oftime information such as the time in seconds, minutes and hours and theactual date in numerical date, day of the week, month and year.

The invention has been described in conjunction wit preferredembodiments and it is to be understood that obvious modifications andchanges may be made without departing from the spirit and scope of theinvention as defined in the appended claims.

What I claim is:

1. In an electronic timepiece having means for displaying the time inminutes and hours: means for continuously generating a succession ofelectric signals at a rate of one signal per day; and date display meansreceptive of said succession of signals for numerically displayingduring each successive day the correct date of the month in numericalform, said date display means comprising resettable counting meansreceptive of said succession of electric signals for counting same anddelivering a corresponding succession of electric date signals insuccessive groups corresponding respectively to the months of a yearwith each goup containing therein from 28 to 31 date signalscorresponding respectively to the different dates in a month andoperative in response to an electric reset signal to begin a new group,electric circuit means responsive to the date signals for developingsaid reset signal and applying same to said resettable counting meansafter the last date of each month to effect resetting of said resettablecounting means and including means for driving said resettable countingmeans through 31 states corresponding to the 31 possible date signalsduring those months containing less than 31 dates and then developingsaid reset signal, and a date display section responsive to each groupof date signals for successively displaying the dates of each month ofeach year.

2. An electronic timepiece according to claim 1; wherein said electriccircuit means includes leap year counting means for developing anelectric leap year signal every 4 years, and means responsive to saidleap year signal for developing said reset signal on the 29th day ofFebruary.

3. An electronic timepiece according to claim 1; including month displaymeans responsive to a succession of month signals for displaying thecorrect month; and wherein said electric circuit means includes meansfor repeatedly developing a succession of month signals correspondingrespectively to the 12 months of the year and successively applying sameto said month display means at the first day of each month.

4. An electronic timepiece. according to claim 3; wherein said means forrepeatedly developing a succession of month signal includes a shiftregister having 12 states corresponding to the 12 months of a year.

5. An electronic timepiece according to claim 1; wherein said means fordriving said resettable counting means through 31 states comprises anAND gate having blocking and gating states and having an input sideconnected to receive the last date signal delivered by said resettablecounting means in each group of date signals which contains from 28 to30 date signals and connected to receive a series of high frequencyclock pulses and having an output side connected to said resettablecounting means for applying clock pulses thereto when said AND gate isin said gating state to drive same whereby'the clock pulses rapidlydrive said resettable counting means through said 31 states to resetsame at the end of those months having 28 to 30 days.

6.- An electronic timepiece according to claim 5; wherein said means fordriving said resettable counting means through 31 states includes a12-bit shift register operative to develop a separate electric monthsignal during each month, and means connecting said shift register tosaid AND gate to apply only those electric month signals correspondingto months having a maximum of from 28 to 30 days to said input side ofsaid AND gate to effect shifting of said AND gate from said gating stateto said blocking state only when said last date signals and saidelectric month signals corresponding to months having a maximum of from28 to 30 days are simultaneously applied thereto.

1. In an electronic timepiece having means for displaying the time inminutes and hours: means for continuously generating a succession ofelectric signals at a rate of one signal per day; and date display meansreceptive of said succession of signals for numerically displayingduring each successive day the correct date of the month in numericalform, said date display means comprising resettable counting meansreceptive of said succession of electric signals for counting same anddelivering a corresponding succession of electric date signals insuccessive groups corresponding respectively to the months of a yearwith each group containing therein from 28 to 31 date signalscorresponding respectively to the different dates in a month andoperative in response to an electric reset signal to begin a new group,electric circuit means responsive to the date signals for developingsaid reset signal and applying same to said resettable counting meansafter the last date of each month to effect resetting of said resettablecounting means and including means for driving said resettable countingmeans through 31 states corresponding to the 31 possible date signalsduring those months containing less than 31 dates and then developingsaid reset signal, and a date display section responsive to each groupof date signals for successively diSplaying the dates of each month ofeach year.
 2. An electronic timepiece according to claim 1; wherein saidelectric circuit means includes leap year counting means for developingan electric leap year signal every 4 years, and means responsive to saidleap year signal for developing said reset signal on the 29th day ofFebruary.
 3. An electronic timepiece according to claim 1; includingmonth display means responsive to a succession of month signals fordisplaying the correct month; and wherein said electric circuit meansincludes means for repeatedly developing a succession of month signalscorresponding respectively to the 12 months of the year and successivelyapplying same to said month display means at the first day of eachmonth.
 4. An electronic timepiece according to claim 3; wherein saidmeans for repeatedly developing a succession of month signal includes ashift register having 12 states corresponding to the 12 months of ayear.
 5. An electronic timepiece according to claim 1; wherein saidmeans for driving said resettable counting means through 31 statescomprises an AND gate having blocking and gating states and having aninput side connected to receive the last date signal delivered by saidresettable counting means in each group of date signals which containsfrom 28 to 30 date signals and connected to receive a series of highfrequency clock pulses and having an output side connected to saidresettable counting means for applying clock pulses thereto when saidAND gate is in said gating state to drive same whereby the clock pulsesrapidly drive said resettable counting means through said 31 states toreset same at the end of those months having 28 to 30 days.
 6. Anelectronic timepiece according to claim 5; wherein said means fordriving said resettable counting means through 31 states includes a12-bit shift register operative to develop a separate electric monthsignal during each month, and means connecting said shift register tosaid AND gate to apply only those electric month signals correspondingto months having a maximum of from 28 to 30 days to said input side ofsaid AND gate to effect shifting of said AND gate from said gating stateto said blocking state only when said last date signals and saidelectric month signals corresponding to months having a maximum of from28 to 30 days are simultaneously applied thereto.